Integer Operations
Vectorizable operations have scalar, immediate, vector and vector-scalar forms. Immediate S1 values are unsigned eight-bit. Vector operands contain two words and start at an even index.
| Family | Operation |
|---|---|
| add, sub, subf | Addition; S2−S1; S1−S2 |
| and, andn, or, nor, xor | Boolean operations; andn complements S1 |
| mul, mulsr8/16/24/31/32 | Signed 32×32 product, optionally shifted right before selecting low 32 result bits |
| clip | Signed comparison S2−S1 > 0; shift its result into Clip |
| f2i | Convert IEEE 754 float S2 to integer after scaling by 2S1 |
| slt, sltu, seq | Signed less-than, unsigned less-than, equality |
| min, max, abs | Signed minimum, maximum and absolute value |
| sl, sr, asr, rotr | Left shift, logical right shift, arithmetic right shift, rotate right |
f2i rounds toward negative infinity and saturates overflow to the most negative or positive integer. Its scale operand is 0..30. Ordinary ALU overflow wraps.
addif, subif and subfif shift the immediate left by sixteen; addsl8 shifts it by eight. at keeps only the upper sixteen bits of S2+S1.
Unpack and sort
getxy and getyx split two packed coordinate halves into 16.16 words, with normal or reversed order. getra and getgb unpack color bytes into two 16.16 words.
sort S3,S2,S1 sorts three general purpose register values. It writes the upper index bits of the smallest, middle and largest operands into Seg0, Seg1 and Seg2. Ties rank S1 first, then S2. The instruction also shifts four identical flags into Clip/WinClip according to the rounded minimum and maximum comparison in its definition.
Reciprocal seed
seedsr D,S2,S1 reads the reciprocal seed and shifts by Scale(S2)−S1, which must be 0..30. It updates Scale, Seed and seed index. The result delay is two. Seed operations also share resources with Fill; observe the seed hazard.
Complete encodings, operands and timing
Sources: Technical Spec, p.8, Technical Spec, p.9