Memory Fill Engine
A Fill Engine instruction writes one scan line. S2 is an even-aligned register pair containing the starting byte address and length in pixels. The address must be pixel aligned. Scalar S1 contains the address delta for the next scan line; the instruction writes starting address + delta to D. FIFO cannot be a Fill Engine source or destination operand.
| Instruction | Data source | Operation |
|---|---|---|
fill | Color register | Solid fill |
mbrush | 32-bit brush | Transparent monochrome expansion, repeated across the line |
mblt | a8..a15 | Transparent monochrome BitBlt |
mbltf | InputFIFO | Transparent monochrome BitBlt |
mbltfo | InputFIFO | Opaque monochrome BitBlt, using foreground and background colors |
cbrush8 / cbrush16 / cbrush32 | a8..a15 | Repeating 8-, 16- or 32-pixel color brush |
cbltf | InputFIFO | Color BitBlt; optional chroma-key rejection |
The left monochrome pixel is bit 31. The first color pixel is in the most significant byte(s). Offset counts source pixels skipped at the left of the operation. Color and write mask must be replicated to 32 bits for 8- or 16-bit pixels. cbltf chroma-key is enabled by format bit 7; the key in a2 must also be replicated.
Lengths are 1..1984 pixels except mblt, which supports 1..255. The detailed parameter tables support cbrush8 at 8/16/32 bpp, cbrush16 at 8/16 bpp and cbrush32 at 8 bpp. The cbrush8 prose restriction conflicts with those tables; see FILL_CSOURCE.
Parameter registers
| Register | Parameter | Write-to-fill hazard |
|---|---|---|
a0 / %128 | Format: 1, 2 or 4 for 8, 16 or 32 bpp | 3 |
a1 / %129 | Write mask | 1 |
a2 / %130 | Color or cbltf key | 2 |
a3 / %131 | Pixel offset | 3 |
a8..a15 / %136..%143 | Brush, monochrome source words or mbltfo background color | 3 |
With SGRAM, each mask bit enables its corresponding write bit. With SDRAM, only the low bit of each mask byte is used: bits 0, 8, 16 and 24 enable bytes 3, 2, 1 and 0. The remaining bits are ignored. Write-mask views show both modes.
Launch and completion
Fill waits for Pixel and Triangle idle. fill, mbrush, mbltf, mbltfo and cbltf then launch in one cycle. Color brush startup can add 1, 3 or 7 cycles according to brush byte width. Reusing unchanged brush, format and offset after another cbrush avoids that overhead. mblt adds ceil((length + offset) / 32) startup cycles.
Changing the SGRAM color or mask can require a memory cycle to load the respective memory register. Avoiding unnecessary parameter writes saves these cycles.
After launch, the RISC runs until another Fill instruction or a required shared resource causes a wait. FIFO-sourced fills block InputFIFO reads and shifter use. mbltfo also blocks a8 writes. Leave one instruction before a following draw/rdraw, and the documented seed hazard before seedsr or step q.
Sources: Technical Spec, p.21, Technical Spec, p.22, Technical Spec, p.23, Technical Spec, p.24