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This shows you the differences between two versions of the page.

--- reference:source_issues [2026/10/11 23:02] – created - external edit 127.0.0.1
+++ reference:source_issues [2026/10/11 23:17] (current) – external edit 127.0.0.1
@@ Line 11: / Line 11: @@
 References: [[registers:risc-special:risc_37|%37 / flag]] · [[registers:host-registers:native_intr|Intr / IO +0x44]] · [[registers:host-registers:native_comm|Comm / IO +0x42]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=25|Technical Spec, p.25]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=41|Technical Spec, p.41]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=25|Technical Spec, p.25]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=41|Technical Spec, p.41]]
 ===== SEG_RANGE =====
@@ Line 21: / Line 21: @@
 References: [[registers:risc-special:risc_35|%35 / seg]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=26|Technical Spec, p.26]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=26|Technical Spec, p.26]]
 ===== ODD_FIELD =====
@@ Line 31: / Line 31: @@
 References: [[registers:risc-special:risc_47|%47 / riscintr]] · [[registers:host-registers:native_intr|Intr / IO +0x44]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=27|Technical Spec, p.27]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=41|Technical Spec, p.41]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=27|Technical Spec, p.27]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=41|Technical Spec, p.41]]
 ===== FILL_CSOURCE =====
@@ Line 41: / Line 41: @@
 References: [[registers:risc-shadow-views:shadow_136|%136 / a8 / R2]] · [[registers:risc-shadow-views:shadow_137|%137 / a9 / F]] · [[registers:risc-shadow-views:shadow_138|%138 / a10 / G2]] · [[registers:risc-shadow-views:shadow_139|%139 / a11 / B2]] · [[registers:risc-shadow-views:shadow_140|%140 / a12 / U]] · [[registers:risc-shadow-views:shadow_141|%141 / a13 / V]] · [[registers:risc-shadow-views:shadow_142|%142 / a14 / dXLong/dy]] · [[registers:risc-shadow-views:shadow_143|%143 / a15 / n/a]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=21|Technical Spec, p.21]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=23|Technical Spec, p.23]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=21|Technical Spec, p.21]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=23|Technical Spec, p.23]]
 ===== DRAW_PAIR3_TEXT =====
@@ Line 51: / Line 51: @@
 References: [[registers:risc-special:risc_40|%40 / npswfifo / drawctl]] · [[registers:pixel-engine:context_drawctl|DrawCtl / StateIndex 131]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=15|Technical Spec, p.15]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=15|Technical Spec, p.15]]
 ===== FIFO_COUNTS =====
@@ Line 61: / Line 61: @@
 References: [[registers:host-registers:native_fifoinfree|FIFOInFree / IO +0x40]] · [[registers:host-registers:native_fifooutvalid|FIFOOutValid / IO +0x41]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=25|Technical Spec, p.25]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=40|Technical Spec, p.40]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=25|Technical Spec, p.25]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=40|Technical Spec, p.40]]
 ===== XBUS_BLANK =====
@@ Line 71: / Line 71: @@
 References: [[registers:host-registers:native_xbusctl|XBusCtl / IO +0x4B]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=43|Technical Spec, p.43]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=55|Technical Spec, p.55]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=66|Technical Spec, p.66]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=43|Technical Spec, p.43]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=55|Technical Spec, p.55]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=66|Technical Spec, p.66]]
 ===== MODE_RESET =====
@@ Line 81: / Line 81: @@
 References: [[registers:host-registers:native_mode|Mode / IO +0x72]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=44|Technical Spec, p.44]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=57|Technical Spec, p.57]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=61|Technical Spec, p.61]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=44|Technical Spec, p.44]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=57|Technical Spec, p.57]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=61|Technical Spec, p.61]]
 ===== MEM_CS0 =====
@@ Line 91: / Line 91: @@
 References: [[registers:host-registers:native_memctl|MemCtl / IO +0xA0]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=44|Technical Spec, p.44]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=61|Technical Spec, p.61]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=44|Technical Spec, p.44]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=61|Technical Spec, p.61]]
 ===== CRTC_TEST_WIDTH =====
@@ Line 101: / Line 101: @@
 References: [[registers:host-registers:native_crtctest|CRTCTest / IO +0x80]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=40|Technical Spec, p.40]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=47|Technical Spec, p.47]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=40|Technical Spec, p.40]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=47|Technical Spec, p.47]]
 ===== VOUT_CONTROL =====
@@ Line 111: / Line 111: @@
 References: [[registers:host-registers:native_crtcctl|CRTCCtl / IO +0x84]] · [[registers:host-registers:native_pclkpll|PClkPLL / IO +0xC0]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=46|Technical Spec, p.46]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=48|Technical Spec, p.48]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=55|Technical Spec, p.55]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=46|Technical Spec, p.46]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=48|Technical Spec, p.48]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=55|Technical Spec, p.55]]
 ===== RISC_MAP_OVERVIEW =====
@@ Line 121: / Line 121: @@
 References: [[registers:host-registers:native_sclkpll|SClkPLL / IO +0x68]] · [[registers:host-registers:native_vinoddbase|VInOddBase / IO +0xD4]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=38|Technical Spec, p.38]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=40|Technical Spec, p.40]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=48|Technical Spec, p.48]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=53|Technical Spec, p.53]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=38|Technical Spec, p.38]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=40|Technical Spec, p.40]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=48|Technical Spec, p.48]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=53|Technical Spec, p.53]]
 ===== WRITE_INTR_GRANULARITY =====
@@ Line 131: / Line 131: @@
 References: [[registers:host-registers:native_writeintr0adr|WriteIntr0Adr / IO +0xD8]] · [[registers:host-registers:native_writeintr1adr|WriteIntr1Adr / IO +0xDC]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=27|Technical Spec, p.27]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=41|Technical Spec, p.41]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=42|Technical Spec, p.42]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=53|Technical Spec, p.53]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=27|Technical Spec, p.27]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=41|Technical Spec, p.41]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=42|Technical Spec, p.42]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=53|Technical Spec, p.53]]
 ===== PALETTE_BA =====
@@ Line 141: / Line 141: @@
 References: [[registers:host-registers:native_palette_status|Palette Status / IO +0xBA]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=51|Technical Spec, p.51]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=52|Technical Spec, p.52]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=51|Technical Spec, p.51]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=52|Technical Spec, p.52]]
 ===== VGA_ATTR_WORDING =====
@@ Line 151: / Line 151: @@
 References: [[registers:vga-registers:vga_attr_index|Attribute index]] · [[registers:vga-registers:vga_attr_10|Attribute[10] / Attribute mode]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=60|Technical Spec, p.60]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=60|Technical Spec, p.60]]
 ===== DRAW_TIMING =====
@@ Line 161: / Line 161: @@
 References: [[risc:opcode:f0|draw1]] · [[risc:opcode:f2|draw2]] · [[risc:opcode:f8|draw3]] · [[risc:opcode:fa|draw4]] · [[risc:opcode:fc|draw5]]
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=14|Technical Spec, p.14]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=14|Technical Spec, p.14]]
 ===== Additional Wording Notes =====
@@ Line 172: / Line 172: @@
 | 42, 61 | Debug.HoldRISC is set by reset; the reset sequence says the RISC starts executing EPROM at 0xFFFFFFF0. | The hold state and entry PC are documented; a release sequence is not supplied here. |
-[[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=29|Technical Spec, p.29]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=30|Technical Spec, p.30]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=33|Technical Spec, p.33]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=36|Technical Spec, p.36]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=42|Technical Spec, p.42]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=61|Technical Spec, p.61]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=62|Technical Spec, p.62]]
+[[https://verite.3d32.org/_media/source/v2200spec.pdf#page=29|Technical Spec, p.29]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=30|Technical Spec, p.30]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=33|Technical Spec, p.33]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=36|Technical Spec, p.36]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=42|Technical Spec, p.42]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=61|Technical Spec, p.61]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=62|Technical Spec, p.62]]
 ===== Derived Views =====