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--- architecture [2026/10/11 23:02] – created - external edit 127.0.0.1
+++ architecture [2026/10/11 23:17] (current) – external edit 127.0.0.1
@@ Line 16: / Line 16: @@
 The chip has two drawing modes. **V1000 compatibility mode** uses ''step'', parallel draw and parameterized draw instructions. **V2000 mode** enables Triangle Engine register shadowing with ''DrawCtl[3:0] = 0xB''. It uses ''tri'' in place of the compatibility draw instructions. [[registers:risc-special:risc_40|DrawCtl]] controls this distinction.
-Sources: [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=4|Technical Spec, p.4]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=5|Technical Spec, p.5]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=16|Technical Spec, p.16]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=21|Technical Spec, p.21]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=38|Technical Spec, p.38]], [[this>lib/exe/fetch.php?media=source:v2200spec.pdf#page=63|Technical Spec, p.63]]
+Sources: [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=4|Technical Spec, p.4]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=5|Technical Spec, p.5]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=16|Technical Spec, p.16]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=21|Technical Spec, p.21]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=38|Technical Spec, p.38]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=63|Technical Spec, p.63]]