https://verite.3d32.org/ 2026-10-11T23:36:42+00:00 https://verite.3d32.org/ https://verite.3d32.org/lib/tpl/verite/images/favicon.ico text/html 2026-10-11T23:23:02+00:00 Anonymous (anonymous@undisclosed.example.com) https://verite.3d32.org/risc/alu?rev=1791760982&do=diff Integer Operations Vectorizable operations have scalar, immediate, vector and vector-scalar forms. Immediate S1 values are unsigned eight-bit. Vector operands contain two words and start at an even index. Family Operation add, sub, subf Addition; S2−S1; S1−S2 text/html 2026-10-11T23:17:45+00:00 Anonymous (anonymous@undisclosed.example.com) https://verite.3d32.org/architecture?rev=1791760665&do=diff V2200 Architecture The V2200 integrates a 32-bit RISC processor, Triangle Engine, Pixel Engine, Fill Engine, PCI bus-master interface, VGA core, CRTC and RAMDAC. Local memory is shared by rendering, display refresh, the RISC and PCI accesses. The memory interface supports 2 to 16 text/html 2026-10-11T23:13:46+00:00 clara (clara@undisclosed.example.com) https://verite.3d32.org/wiki/deployment_check?rev=1791760426&do=diff text/html 2026-10-11T22:55:49+00:00 Anonymous (anonymous@undisclosed.example.com) https://verite.3d32.org/start?rev=1791759349&do=diff Vérité V2200 V2200 3D/2D Graphics and Video Processor. Technical reference for the RISC, drawing engines, register interfaces and display hardware. Programming Reference Section Contents Architecture RISC, drawing engines, local memory and PCI. RISC Opcodes, instruction formats, branches and register hazards.