Texture Sampling

SrcMode selects source format, texture function and point or bilinear sampling. Source formats include 332 RGB, intensity, alpha, 565 RGB, 4444 ARGB, 1555 ARGB, 8888 ARGB, 4-bit indexed 16-bit colors and packed Y0CrY1Cb. Formats without an explicit alpha field are opaque (alpha 255). Set SrcFmt zero for BitBlt and other 2D operations; it uses DstFmt.

SrcFunc Source color Source alpha
0 — No texture Foreground/background Color ColorAlpha
1 — Replace TexColor TexAlpha
2 — Decal (1 − TexAlpha) × Color + TexAlpha × TexColor ColorAlpha
3 — Modulate Color × TexColor TexAlpha × ColorAlpha

SrcFilter zero selects point sampling or BitBlt; one enables bilinear filtering. SrcBGR selects red in the least significant source bits rather than blue. SrcColorNoPad controls expansion of reduced-width components to eight bits: clear for corrected low bits, set for zero low bits.

Coordinates and masks

SrcMask stores UMask and VMask, normally texture width−1 and height−1. Maximum texture width and height are 2048. UClamp/VClamp clamp each coordinate to its mask range; otherwise masking supplies wrapping.

UMask, VMask and SwapUV apply when coordinates enter the Pixel Engine, not when the pixel is finally drawn. Set them before the relevant U/V writes. A later mask write does not change an already stored coordinate.

The Stride fields encode source, destination and Z row increments as a sum of shifts. Use the Stride tables rather than assuming the field is a direct byte count.

Four-bit textures

Eight Tex4Pal registers contain 16 colors. The even palette index is in bits 31:16; the odd index is in bits 15:0. SrcFmt chooses 565, 4444 or 1555 interpretation.

The default register diagrams show these two documented 16-bit halves. Optional channel views use conventional packing; the PDF does not give their internal channel bit positions or specify where SrcBGR swapping occurs. These views are marked as derived.

Chroma key · Perspective correction

Sources: Technical Spec, p.29, Technical Spec, p.30, Technical Spec, p.31, Technical Spec, p.32