====== scr / 0x7E ======

[[risc:opcodes|Opcode map]]

^ Property ^ Definition ^
| OP | ''0x7E'' |
| Operands | ''offset8(S1),S2'' |
| Operation | Store S2 bytes at offsets 1,5,9,13; quad-word aligned |
| Timing | scr takes two DCache cycles |

[[risc:hazards|Instruction hazards]] · [[registers:opcodes:start|Instruction formats]]

Source: [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=9|Technical Spec, p.9]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=10|Technical Spec, p.10]]