====== V2200 Architecture ======

The V2200 integrates a 32-bit RISC processor, Triangle Engine, Pixel Engine, Fill Engine, PCI bus-master interface, VGA core, CRTC and RAMDAC. Local memory is shared by rendering, display refresh, the RISC and PCI accesses. The memory interface supports 2 to 16 MB of SGRAM or SDRAM on a 64-bit data bus.

^ Block ^ Function ^ Programming reference ^
| RISC | Executes microcode, reads command FIFO data and launches drawing operations. | [[risc:programming|RISC programming]] |
| Triangle Engine | Walks edges and spans; iterates vertex parameters and performs perspective correction. | [[drawing:triangle|Triangle drawing]] |
| Pixel Engine | Samples textures; applies visibility tests, blending, fog, dithering and plane masks. | [[pixel:overview|Pixel operations]] |
| Fill Engine | Writes scan lines of solid, monochrome or color data. | [[drawing:fill|Memory fills]] |
| PCI interface | Maps local memory and control registers; transfers command data by DMA. | [[host:interface|Host interface]] |
| CRTC / RAMDAC | Reads the display surface and produces analog or digital video. | [[video:display|Display control]] |
| VGA | Provides text and graphics compatibility through mode 13 and mode X. | [[video:vga|VGA and VESA modes]] |

The RISC launches work into the drawing engines. A launch can finish before the drawing operation finishes. Later instructions stall when they require a busy engine or a shared resource. Issue time, result delay and register hazards are separate quantities; see [[risc:hazards|instruction hazards]].

The chip has two drawing modes. **V1000 compatibility mode** uses ''step'', parallel draw and parameterized draw instructions. **V2000 mode** enables Triangle Engine register shadowing with ''DrawCtl[3:0] = 0xB''. It uses ''tri'' in place of the compatibility draw instructions. [[registers:risc-special:risc_40|DrawCtl]] controls this distinction.

Sources: [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=4|Technical Spec, p.4]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=5|Technical Spec, p.5]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=16|Technical Spec, p.16]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=21|Technical Spec, p.21]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=38|Technical Spec, p.38]], [[https://verite.3d32.org/_media/source/v2200spec.pdf#page=63|Technical Spec, p.63]]